377 research outputs found

    OBDD-Based Representation of Interval Graphs

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    A graph G=(V,E)G = (V,E) can be described by the characteristic function of the edge set χE\chi_E which maps a pair of binary encoded nodes to 1 iff the nodes are adjacent. Using \emph{Ordered Binary Decision Diagrams} (OBDDs) to store χE\chi_E can lead to a (hopefully) compact representation. Given the OBDD as an input, symbolic/implicit OBDD-based graph algorithms can solve optimization problems by mainly using functional operations, e.g. quantification or binary synthesis. While the OBDD representation size can not be small in general, it can be provable small for special graph classes and then also lead to fast algorithms. In this paper, we show that the OBDD size of unit interval graphs is O( V /log V )O(\ | V \ | /\log \ | V \ |) and the OBDD size of interval graphs is $O(\ | V \ | \log \ | V \ |)whichbothimproveaknownresultfromNunkesserandWoelfel(2009).Furthermore,wecanshowthatusingourvariableorderandnodelabelingforintervalgraphstheworstcaseOBDDsizeis which both improve a known result from Nunkesser and Woelfel (2009). Furthermore, we can show that using our variable order and node labeling for interval graphs the worst-case OBDD size is \Omega(\ | V \ | \log \ | V \ |).Weusethestructureoftheadjacencymatricestoprovethesebounds.Thismethodmaybeofindependentinterestandcanbeappliedtoothergraphclasses.Wealsodevelopamaximummatchingalgorithmonunitintervalgraphsusing. We use the structure of the adjacency matrices to prove these bounds. This method may be of independent interest and can be applied to other graph classes. We also develop a maximum matching algorithm on unit interval graphs using O(\log \ | V \ |)operationsandacoloringalgorithmforunitandgeneralintervalsgraphsusing operations and a coloring algorithm for unit and general intervals graphs using O(\log^2 \ | V \ |)$ operations and evaluate the algorithms empirically.Comment: 29 pages, accepted for 39th International Workshop on Graph-Theoretic Concepts 201

    Synthesizing Finite-state Protocols from Scenarios and Requirements

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    Scenarios, or Message Sequence Charts, offer an intuitive way of describing the desired behaviors of a distributed protocol. In this paper we propose a new way of specifying finite-state protocols using scenarios: we show that it is possible to automatically derive a distributed implementation from a set of scenarios augmented with a set of safety and liveness requirements, provided the given scenarios adequately \emph{cover} all the states of the desired implementation. We first derive incomplete state machines from the given scenarios, and then synthesis corresponds to completing the transition relation of individual processes so that the global product meets the specified requirements. This completion problem, in general, has the same complexity, PSPACE, as the verification problem, but unlike the verification problem, is NP-complete for a constant number of processes. We present two algorithms for solving the completion problem, one based on a heuristic search in the space of possible completions and one based on OBDD-based symbolic fixpoint computation. We evaluate the proposed methodology for protocol specification and the effectiveness of the synthesis algorithms using the classical alternating-bit protocol.Comment: This is the working draft of a paper currently in submission. (February 10, 2014

    Propositional Dynamic Logic for Message-Passing Systems

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    We examine a bidirectional propositional dynamic logic (PDL) for finite and infinite message sequence charts (MSCs) extending LTL and TLC-. By this kind of multi-modal logic we can express properties both in the entire future and in the past of an event. Path expressions strengthen the classical until operator of temporal logic. For every formula defining an MSC language, we construct a communicating finite-state machine (CFM) accepting the same language. The CFM obtained has size exponential in the size of the formula. This synthesis problem is solved in full generality, i.e., also for MSCs with unbounded channels. The model checking problem for CFMs and HMSCs turns out to be in PSPACE for existentially bounded MSCs. Finally, we show that, for PDL with intersection, the semantics of a formula cannot be captured by a CFM anymore

    Unreasonable doubt: Politics and aesthetics in the crime novels of Horacio Vázquez Rial

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    Horacio Vázquez Rial (Buenos Aires, 1947–Madrid, 2012) was an Argentine writer, historian and ex-militant in the Trotskyite Ejército Revolucionario del Pueblo (People’s Revolutionary Army, or ERP). He left Argentina for Spain in the mid-1970s and became an outspoken critic of the Latin American left and in particular of the Kirchner and Fernández de Kirchner governments in the 2000s. He also penned a series of pioneering, neo-noir thrillers that return time and again to the violence of the mid- to late-1970s in Argentina. This paper draws on the work of Andrew Popper on crime fiction, Fredric Jameson on Raymond Chandler and Joel Black on the aesthetics of murder. It also responds to the work of Neil Larsen on another writer with a similar political trajectory, Mario Vargas Llosa, and answers a recent call from Jens Andermann for cultural studies practitioners to examine the ideology and the technique of right-wing works, in this case those dealing explicitly with the author’s own former armed militancy

    An automaton over data words that captures EMSO logic

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    We develop a general framework for the specification and implementation of systems whose executions are words, or partial orders, over an infinite alphabet. As a model of an implementation, we introduce class register automata, a one-way automata model over words with multiple data values. Our model combines register automata and class memory automata. It has natural interpretations. In particular, it captures communicating automata with an unbounded number of processes, whose semantics can be described as a set of (dynamic) message sequence charts. On the specification side, we provide a local existential monadic second-order logic that does not impose any restriction on the number of variables. We study the realizability problem and show that every formula from that logic can be effectively, and in elementary time, translated into an equivalent class register automaton

    Propositional Dynamic Logic with Converse and Repeat for Message-Passing Systems

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    The model checking problem for propositional dynamic logic (PDL) over message sequence charts (MSCs) and communicating finite state machines (CFMs) asks, given a channel bound BB, a PDL formula φ\varphi and a CFM C\mathcal{C}, whether every existentially BB-bounded MSC MM accepted by C\mathcal{C} satisfies φ\varphi. Recently, it was shown that this problem is PSPACE-complete. In the present work, we consider CRPDL over MSCs which is PDL equipped with the operators converse and repeat. The former enables one to walk back and forth within an MSC using a single path expression whereas the latter allows to express that a path expression can be repeated infinitely often. To solve the model checking problem for this logic, we define message sequence chart automata (MSCAs) which are multi-way alternating parity automata walking on MSCs. By exploiting a new concept called concatenation states, we are able to inductively construct, for every CRPDL formula φ\varphi, an MSCA precisely accepting the set of models of φ\varphi. As a result, we obtain that the model checking problem for CRPDL and CFMs is still in PSPACE

    Asynchronous Games over Tree Architectures

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    We consider the task of controlling in a distributed way a Zielonka asynchronous automaton. Every process of a controller has access to its causal past to determine the next set of actions it proposes to play. An action can be played only if every process controlling this action proposes to play it. We consider reachability objectives: every process should reach its set of final states. We show that this control problem is decidable for tree architectures, where every process can communicate with its parent, its children, and with the environment. The complexity of our algorithm is l-fold exponential with l being the height of the tree representing the architecture. We show that this is unavoidable by showing that even for three processes the problem is EXPTIME-complete, and that it is non-elementary in general

    Explicit connection actions in multiparty session types

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    This work extends asynchronous multiparty session types (MPST) with explicit connection actions to support protocols with op- tional and dynamic participants. The actions by which endpoints are connected and disconnected are a key element of real-world protocols that is not treated in existing MPST works. In addition, the use cases motivating explicit connections often require a more relaxed form of mul- tiparty choice: these extensions do not satisfy the conservative restric- tions used to ensure safety in standard syntactic MPST. Instead, we de- velop a modelling-based approach to validate MPST safety and progress for these enriched protocols. We present a toolchain implementation, for distributed programming based on our extended MPST in Java, and a core formalism, demonstrating the soundness of our approach. We discuss key implementation issues related to the proposed extensions: a practi- cal treatment of choice subtyping for MPST progress, and multiparty correlation of dynamic binary connections

    Parallelizing Synthesis from Temporal Logic Specifications by Identifying Equicontrollable States

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    For the synthesis of correct-by-construction control policies from temporal logic specifications the scalability of the synthesis algorithms is often a bottleneck. In this paper, we parallelize synthesis from specifications in the GR(1) fragment of linear temporal logic by introducing a hierarchical procedure that allows decoupling of the fixpoint computations. The state space is partitioned into equicontrollable sets using solutions to parametrized games that arise from decomposing the original GR(1) game into smaller reachability-persistence games. Following the partitioning, another synthesis problem is formulated for composing the strategies from the decomposed reachability games. The formulation guarantees that composing the synthesized controllers ensures satisfaction of the given GR(1) property. Experiments with robot planning problems demonstrate good performance of the approach
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